Accelerators and ASICs
TPUs, NPUs, and domain-specific hardware for ML and DSP.
Accelerators and ASICs covers tpus, npus, and domain-specific hardware for ml and dsp. This page is a stub: it names the topic and locates it within Computer Architecture, but the substantive treatment — algorithms, key results, and the canonical literature — is intentionally deferred.
Frontier-paper sourcing for accelerators and asics is queued for a follow-up OpenAlex wave; once that wave completes, this page will be promoted to a full draft with inline citations of the primary references. In the meantime, the parent topic (computer-science/systems/computer-architecture) provides the relevant context and prerequisite chain.
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